2024 • 2024 IEEE 10th Electronics System-Integration Technology Conference (ESTC), Berlin, Germany, 2024, pp. 1-4
This study focuses on processed wafers undergoing the chemical mechanical planarization (CMP) process, with a particular emphasis on monitoring the dielectric stack thickness between Cu VIA structures, patterned in approximately a 45 μm raster. Spectroscopic ellipsometry was applied to determine the one-dimensional stack multilayer thickness, while imaging spectroscopic reflectometry was used to reveal the lateral thickness profile.
A. Suto, P. Basa, Gy. Nadudvari, S. Poppa