Recent Developments in Electrical Metrology for MOS Fabrication

High leakage gate stacks are modeled as parallelRC equivalent circuits.♦ To resolve the capacitance, use of higherfrequencies will reduce the capacitive impedance,making that element dominate the parallelresistance/conductance.♦ But this only works if there is negligible parasiticseries resistance in the test structure. Use ofhigher frequencies if series resistance is presentonly makes the capacitive impedance of interestnegligible in comparison with Rs.